Modo de Emacs para Verilog

Tabla de comandos de verilog-mode

NOTA: Tomado del verilog-mode versión 3.57, La descripción de algunos comandos la puedes encontrar aquí (en ingles) y la referencia de los /*AUTOMATICOS*/ aqui

Key translations:
key             binding
---             -------

C-x             Prefix Command

C-x 8           iso-transl-ctl-x-8-map


Major Mode Bindings:
key             binding
---             -------

C-c             Prefix Command
ESC             Prefix Command
<M-delete>      kill-word
<delete>        delete-char
<backspace>     backward-delete-char-untabify
RET             electric-verilog-terminate-line
TAB             electric-verilog-tab
`               electric-verilog-tick
=               electric-verilog-equal
:               electric-verilog-colon
C-;             electric-verilog-semi-with-comment
;               electric-verilog-semi

C-c C-t         Prefix Command
C-c C-h         verilog-header
C-c C-e         verilog-expand-vector
C-c C-s         verilog-auto-save-compile
C-c C-a         verilog-auto
C-c C-k         verilog-delete-auto
C-c C-d         verilog-goto-defun
C-c C-u         verilog-uncomment-region
C-c C-c         verilog-comment-region
C-c C-b         verilog-submit-bug-report
C-c =           verilog-pretty-expr
C-c TAB         verilog-pretty-declarations
C-c C-r         verilog-label-be
C-c `           verilog-lint-off

ESC C-e         verilog-end-of-defun
ESC C-a         verilog-beg-of-defun
ESC *           verilog-star-comment
ESC C-h         verilog-mark-defun
ESC ?           verilog-show-completions
ESC TAB         verilog-complete-word
ESC RET         ??
ESC C-f         electric-verilog-forward-sexp
ESC C-b         electric-verilog-backward-sexp

C-c C-t R       verilog-sk-reg
C-c C-t W       verilog-sk-wire
C-c C-t =       verilog-sk-inout
C-c C-t S       verilog-sk-state-machine
C-c C-t O       verilog-sk-output
C-c C-t I       verilog-sk-input
C-c C-t F       verilog-sk-function
C-c C-t A       verilog-sk-assign
C-c C-t /       verilog-sk-comment
C-c C-t :       verilog-sk-else-if
C-c C-t ?       verilog-sk-if
C-c C-t z       verilog-sk-casez
C-c C-t x       verilog-sk-casex
C-c C-t w       verilog-sk-while
C-c C-t t       verilog-sk-task
C-c C-t s       verilog-sk-specify
C-c C-t r       verilog-sk-repeat
C-c C-t p       verilog-sk-primitive
C-c C-t m       verilog-sk-module
C-c C-t j       verilog-sk-fork
C-c C-t i       verilog-sk-initial
C-c C-t h       verilog-sk-header
C-c C-t g       verilog-sk-generate
C-c C-t f       verilog-sk-for
C-c C-t e       verilog-sk-else
C-c C-t c       verilog-sk-case
C-c C-t b       verilog-sk-begin
C-c C-t a       verilog-sk-always


CategoryProyectoTale

ProyectoTale/Documentacion/Verilog (last edited 2009-09-13 09:54:08 by digitalfredy)